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TC90L01NG
TOSHIBA Linear C-MOS Integrated Circuit
Silicon Monolithic
TC90L01NG(TENTATIVE)
Audio/Video Switching IC for TVs
TC90L01NG
The TC90L01NG is an audio/video switching IC for TV sets. Conforming to I C bus standards, it allows you to perform various switching operations through the bus lines by using a microcomputer. This IC has the functions of audio mute, ALC(Auto Level Control), audio volume and so on.
Weight SDIP24-P-300-1.78 : 1.22 g (typ.)
2
Features
I C bus control Video : 3-channel inputs and 1-channel outputs (1 channels conforming to S system) Audio : 3-channel inputs and 1-channel outputs Monitor Audio out ALC(Auto Level Control) Audio volume by attenator circuit Audio mute 2 I/O ports
2
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2006/02/16
TC90L01NG
Block Diagram
VCC GND
12 15
VCC GND
V1-V/Y in V2-V in TV-V in
4 8 2
22
V out
18 + S V1-C in 6 20
Y out
C out
Mute 24
IC BUS ALC 10 ALC IL Logic
2
2
14 13
SCL SDA
19 I/O 21
I/O-1 I/O-2
V1-L in V2-L in TV-V in
5 9 1
Volume
17 24
TV-L out Mon-L out
Volume 16 V1-R in V2-R in TV-R in 7 11 3 23 TV-R out Mon-R out
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TC90L01NG
Pin Assignment
TC90L01NG
1 TV-L in Mon-L out 24
2 TV-V in
Mon-R out 23
3 TV-R in
V out 22
4 V1-V/Y in
I/O-2 21
5 V1-L in
C out 20
11 V1-C in 6
TC90L01NG
I/O-1 19
7 V1-R in
Y out 18
8 V2-V in
TV-L out 17
9 V2-L in
TV-R out 16
10 ALC
GND 15
11 V2-R in
SCL 14
12 VCC
SDA 13
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TC90L01NG
Pin Description
Pin No. Name Function Interface
1
TV-L in
This pin is for input a left audio signal from the main demodulator in the TV set. The signal fed into this pin is presented to TV-L out, and Mon-L out. The input dynamic range of this pin is 5.0 Vp-p and the input resistance is 120 k.
300
Audio Out Audio In
120k
4.5V
2
TV-V in
This pin is for input a composite audio signal from the main demodulator in the TV set. The signal fed into this pin is presented to V out, Y out, and C out. The input dynamic range of this pin is 2.0 Vp-p and the input resistance is 30 k.
Vi deo In
60k
Y out
200
C out
V out
60k
3
TV-R in
This pin is for input a right audio signal from the main demodulator in the TV set. The signal fed into this pin is presented to TV-R out, and Mon-R out. The input dynamic range of this pin is 5.0 Vp-p and the input resistance is 120 k.
Audio In
300
Audio Out
120k
4.5V
4
V1-V/Y in
This pin is for input a luminance signal or composite video signal from an external source (V1 channel). The signal fed into this pin is presented to V out, Y out, and C out. The input dynamic range of this pin is 2.0 Vp-p and the input resistance is 30 k.
60k
Y out
200
C out
V out
Vi deo In
60k
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TC90L01NG
Pin No.
Name
Function
Interface
5
V1-L in
This pin is for input a left audio signal from an external source (V1 channel). The signal fed into this pin is presented to TV-L out, and Mon-L out. The input dynamic range of this pin is 5.0 Vp-p and the input resistance is 120k.
300
Audio Out Audio In
120k
4.5V
6
V1-C in
This pin is for input a chroma signal from an external source (S1 channel). The signal fed into this pin is presented to C out directly and to V out after being combined with the V1-Y in signal. The input dynamic range of this pin is 2.0 Vp-p and the input resistance is 30 k.
60k
Y out
200
C out
V out
Vi deo In
60k
7
V1-R in
This pin is for input a right audio signal from an external source (V1 channel). The signal fed into this pin is presented to TV-R out, and Mon-R out. The input dynamic range of this pin is 5.0 Vp-p and the input resistance is 120 k.
300
Audio Out Audio In
120k
4.5V
8
V2-V in
This pin is for input a composite video signal from an external source (V2 channel). The signal fed into this pin is presented to V out, Y out, and C out. The input dynamic range of this pin is 2.0 Vp-p and the input resistance is 30 k.
60k
Y out
200
C out
V out
Vi deo In
60k
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TC90L01NG
Pin No.
Name
Function
Interface
9
V2-L in
This pin is for input a left audio signal from an external source (V2 channel). The signal fed into this pin is presented to TV-L out and Mon-L out. The input dynamic range of this pin is 5.0 Vp-p and the input resistance is 120.
300
Audio Out Audio In
120k
4.5V
10
ALC
This is an detect output pin of ALC[:Auto Level Control]. It controls ALC.
100 ALC
ALC
11
V2-R in
This pin is for input a right audio signal from an external source (V2 channel). The signal fed into this pin is presented to TV-R out and Mon-R out. The input dynamic range of this pin is 5.0 Vp-p and the input resistance is 120 k.
300
Audio Out Audio In
120k
4.5V
12
VCC
This is the power supply pin. Apply 9 V to this pin. The current consumption of this pin is 34 mA.
5.0V
13
SDA
This is an I2C bus data input/output pin. The input threshold level of this pin is 3.0 V. Make sure that the current flowing into this pin is 3.0 mA or less.
LO G IC 13 SDA
3.0V
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TC90L01NG
Pin No.
Name
Function
Interface
5.0V
LOGIC
14
SCL
This is an I2C bus data input/output pin. The input threshold level of this pin is 3.0 V.
14
SCL
3.0V
15
GND
This is the GND pin.
16
TV-R out
This pin is for output right audio signal. The signal fed into TV-R in, V1-R in, or V2-R in is outputted from this pin. This outputted can be muted independently of TV-L out by bus control.
Audio Out
17
TV-L out
This pin is for output left audio signal. The signal fed into TV-L in, V1-L in, or V2-L in is outputted from this pin. This output can be muted independently of TV-R out by bus control.
Audio Out
18
Y out
This pin is for output a luminance signal. The signal fed into V1-V/Y in, V2-V in, or TV-V in is outputted from this pin.
Video Out
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TC90L01NG
Pin No.
Name
Function
Interface
This is an ADC input/DAC output pin. The ADC is a 2-level detection type (1 bits). The threshold level is 3.0 V. The DAC (1 bit) is an open-drain output. Make sure that the current flowing into this pin is 2.0 mA or less.
I/O
19
I/O
3.0V
20
C out
This pin is for output a chroma signal. The signal fed into V1-C in, V1-V in, V2-V in , or TV-V in is outputted from this pin.
Video Out
This is an ADC input/DAC output pin. The ADC is a 2-level detection type (1 bits). The threshold level is 3.0 V. The DAC (1 bit) is an open-drain output. Make sure that the current flowing into this pin is 2.0 mA or less.
I/O
21
I/O
3.0V
22
V out
This pin is for output the main channel composite video signal. The signal fed into TV-V in, V1-V in, V2-V in, or V1-Y in +V1-C in is outputted from this pin. This output can be muted by bus control.
Video Out
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TC90L01NG
Pin No.
Name
Function
Interface
23
Mon-R out
This pin is for monitor-output right audio signal. The signals fed into the chip via V1-R in, V2-R in, or TV-R in is output from this pin. This output can be muted in combination with Mon-L out by bus control.
Audio Out
24
Mon-L out
This pin is for monitor-output left audio signal. The signals fed into the chip via V1-L in, V2-L in, or TV-L in is output from this pin. This output can be muted in combination with Mon-R out by bus control.
Audio Out
9
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TC90L01NG
Bus Data Specifications
Contents of Data
Sub Mode Add. [Preset] B07 00 Data 1 [00H] B17 Audio Mute B27 02 Data 3 [03H] B37 Read Data 4 B36 B35 B34 B33 DAC output switching B32 I/O-2 B31 I/O-1 B30 S input discriminati on I/O-1 V1-C in B26 B25 B24 Output switching ALC Gain Select-D Write Data 2 01 [00H] B16 B15 B14 Select-C B13 Audio attenator B23 B22 B21 B20 Select-B B12 B11 Select-A B10 B06 B05 B04 B03 B02 B01 B00 Data No. Contents of Data
Power on Reset

ADC input discrimination I/O-2
Note1: The data contents marked by a are an unused bit (data free).
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TC90L01NG
WRITE mode Item
Slave Add.90H Bits
Descriptions
Select input function 00: 01: External 1 10: External 2 11: Inhibited or -video switching 0: 1: -video Monitor-Video out 0: Normal 1: Mute Monitor-Audio out 0: Normal 1: Mute Audio Level Control Gain 00: off 01: 1.1Vp-p 10: 1.6Vp-p 11: 2.3Vp-p Audio Volume 00: - 7F: 0dB Audio Mute 0: Normal 1: Mute DAC output switching 0: Low 1: High
Preset
00 0 0 0 10 00 0 1
Select Sub; 00 h,D0D1 Note 2 Select Sub; 00 h,D2 Select Sub; 00 h,D3 Select Sub; 00 h,D4 Level Sub; 00 h,D5D6 Audio Vol. Sub; 01h,D0D6 Audio mute on/off Sub; 01h,D7 I/O-* High/Low Sub; 02h,D1,D2

x
Note 2Select-not use. READ mode Item
POR V1-C in I/O *
Slave Add.91H Bits
x
Description
Power on Reset 0: Normal 1: Resister Preset S input discrimination 0: GND 1: Open ADC input discrimination 0: Low 1: High
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TC90L01NG
Video Select: Terminal 22 , 18 , 20 Output Signal Audio Select: Terminal 17 , 16 , 24 , 23 Output Signal
Mode Video Output Signal Audio Output Signal TV-L out Mon-L out TV CVBS TV-V in TV-V in TV-V in TV-L in TV-R out Mon-R out TV-R in B02 B 0 0 Bus Data Input Select Input S/V V out Y out C out B01 A 0 B00
CVBS V1 S
V1-V in V1-Y in + V1-C in V2-V in
V1-V in
V1-V in
V1-L in
V1-R in
0
0
1
V1-Y in
V1-C in
V1-L in
V1-R in
1
0
1
V2 V3
CVBS -
V2-V in
V2-V in
V2-L in
V2-R in
0 0
1 1
0 1
DAC Output Switching
Mode Output I/O-1 State Low Open I/O-2 Low Open 0 1 B23 Bus Data DAC Output Switching B22 B21 B20 0 1
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TC90L01NG
Read Mode
Power-On Reset Discrimination
Bus Data Mode Power-On Reset B37 Reset On (Preset) off (Normal) 1 0
S Input Discrimination
Mode Input V1-C in Voltage High (open) Low Bus Data S Input Discrimination B30 1 0
ADC Input Discrimination
Mode Input Voltage High I/O-1 Low High I/O-2 Low 0 1 0 B34 B33 Bus Data ADC Input Discrimination B32 B31 1
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TC90L01NG
Outline of I C Bus Control Format
DATA TRANSFER FORMAT VIA I2C BUS Start and stop condition
SDA
2
SCL
S Start condition P Stop condition
Bit transfer
SDA
SCL
SDA stable
Change of SDA allowed
Acknowledge
SDA by transmitter SDA by receiver SCL from master
The transmitter releases the SDA line (HIGH) during the acknowledge clock pulse.
The receiver has to pull down the SDA line (LOW) during the acknowledge clock pulse.
S
1
8
9 Clock pulse for acknowledgment
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TC90L01NG
Data transmit format 1
S Slave address 7bit MSB S : Start condition 0A Sub address 8bit MSB A : Acknowledge MSB P : Stop condition A Transmit data 8bit AP
Data transmit format 2
S Slave address 0A Sub address A Transmit data 1 A A AP
Sub address
Transmit data n
Data received format
S Slave address 7bit MSB MSB 1A Received data 01 8bit A Received data 02 AP
At the moment of the first acknowledge, the master transmitter becomes a master receiver and the slave receiver becomes a slave transmitter. This acknowledge is still generated by the slave. The Stop condition is generated by the master. Optional data transmit format : automatic increment mode
S Slave address 7bit MSB MSB 0A1 Sub address 7bit MSB A Transmit data 1 8bit MSB Transmit data n 8bit AP
In this transmission methods, data is set on automatically incremented sub-address from the specified sub-address.
I2C BUS Conditions
Characteristics Low level input voltage High level input voltage Low level output voltage at 3 mA sink current Input current each I/O pin with an input voltage between 0.1 VDD and 0.9 VDD Capacitance for each I/O pin SCL clock frequency Hold time START condition Low period of SCL clock High period of SCL clock Set-up time for a repeated START condition Data hold time Data set-up time Set-up time for STOP condition Bus free time between a STOP and START condition Symbol VIL VIH VOL1 Ii Ci fSCL tHD;STA tLOW tHIGH tSU;STA tHD;DAT tSU;DAT tSU;STO tBUF Min 0 3.0 0 -10 - 0 4.0 4.7 4.0 4.7 10 250 4.0 4.7 Typ. - - - - - - - - - - - - - - Max 1.5 Vcc 0.8 10 10 100 - - - - - - - - Unit V V V A pF kHz s s s s ns ns s s
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TC90L01NG
Absolute Maximum Ratings
Characteristics Symbol Rating 11 GND - 0.3 to Vcc + 0.3 1250 2065 55150 Unit V V mW C C
Supply voltage
Input Pin Voltage Power dissipation Operating temperature Storage temperature
VCC
Vin PDMAX (Note3) Topr Tstg
Note3: When using the device at temperatures above Ta = 25C, reduce the rated power dissipation by 10.0 mW at TC90L01NG per degree of centigrade. (See the diagram below.)
(mW)
1250
Power consumption
PD
10.0 mW/C 850
0 0 Ambient temperature 25 65
Ta (C)
150
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TC90L01NG
Operating Conditions
Characteristics Test Condition 12 2, 4, 8 4, 8 6 1, 3, 5, 7, 9, 11 Min 8.1 Typ. 9.0 1.0 1.0 286 Max 9.9 3.0 Unit V Vp-p Vp-p 100IRE 100IRE Remark
Supply voltage Composite signal input amplitude Y input amplitude
Chroma input amplitude Audio input amplitude
mVp-p Burst Vp-p
Electrical Characteristics
(referenced to VCC = 9 V at Ta = 25C unless otherwise specified) Current Consumption
Pin No. Pin Name Symbol Test Circuit Min 20 Typ. 34 Max 48 Unit mA
12
VCC
ICC
17
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TC90L01NG
Pin Voltage
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 15 16 17 18 19 20 21 22 23 24 Pin Name Symbol V1 V2 V3 V4 V5 V6 V7 V8 V9 V10 V11 V12 V15 V16 V17 V18 V19 V20 V21 V22 V23 V24 Test Circuit Min 4.3 4.1 4.3 4.1 4.3 4.1 4.3 4.1 4.3 4.3 4.0 4.0 4.0 4.0 4.0 4.2 4.2 Typ. 4.5 4.3 4.5 4.3 4.5 4.3 4.5 4.3 4.5 5.0 4.5 9.0 0 4.5 4.5 4.3 4.3 4.3 4.5 4.5 Max 4.7 4.5 4.7 4.5 4.7 4.5 4.7 4.5 4.7 4.7 5.0 5.0 4.6 4.6 4.6 4.8 4.8 Unit V V V V V V V V V V V V V V V V V V V V V V
TV-L in TV-V in TV-R in V2-V/Y in V1-L in V1-C in V1-R in V2-V in V2-L in ALC V2-R in VCC GND TV-R out TV-L out Y out I/O-1 C out I/O-2 V out Mon-R out Mon-L out
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TC90L01NG
DC Characteristics
Characteristics Measured Pin Symbol R2 R4 R8 R6 R1 R3 R5 R7 R9 R11 R22 R18 R20 R17 R16 R24 R23 Test Circuit Min. 20 20 20 20 80 80 80 80 80 80 30 30 30 30 30 30 30 Typ. 30 30 30 30 120 120 120 120 120 120 50 50 50 50 50 50 50 Max. 40 40 40 40 160 160 160 160 160 160 80 80 80 80 80 80 80 Unit k k k k k k k k k k Voltage on pin 6 at which data B30 changes. High-Low threshold level of I/O-1 input (pin 19). High-Low threshold level of I/O-2 input (pin 21). Measure a voltage change V on each pin when a current of 100 A flows into the pin. Then calculate the output resistance value R. R = V/100 A [] R = 0.5 V/I [] Measure a change I in the current flowing into each pin when the voltage is raised by 0.5V. Then calculate the input resistance value R. Remark
TV-V in V1-V/Y in V2-V in V1-C in
Input pin
TV-L in
Input resistance
TV-R in V1-L in V1-R in V2-L in V2-R in V out Y out
Output pin Output resistance
C out TV-L out TV-R out Mon-L out Mon-R out
S mode discrimination voltage
V1-C in
VthC1
2.0
2.5
3.0
V
I/O 1
ADC input voltage discrimination
VthI1
2.5
3.0
3.5
V
I/O 2
VthI2
2.5
3.0
3.5
V
19
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TC90L01NG
AC Characteristics
Characteristics Select Mode Symbol Test Circuit Min. Typ. Max. Unit Test Method
TV-V in
VDR2V1
1.5
Vp-p (1) Apply a 15 kHz sine wave to each input pin. (2) In each select mode, measure an input amplitude at which the output waveform on pin 22 begins to be distorted.
V out Input dynamic range
V1-V/Y in
VDR4V1
1.5
.
Vp-p
V2-V in
VDR8V1
1.5
Vp-p
V2-C in
VDR6V1
1.5
Vp-p
TV-V in
G2V1
5.5
6.0
6.5
dB (1) Apply a 15 kHz, 1.0 Vp-p sine wave to each input pin. (2) In each select mode, find the gain between input and output.
V out Gain
V1-V/Y in
G4V1
5.5
6.0
6.5
dB
V2-V in
G8V1
5.5
6.0
6.5
dB
V2-C in
G6V1
5.5
6.0
6.5
dB
TV-V in
F2V1
15
MHz (1) Apply a 1.0 Vp-p sine wave to each input pin.
V out Frequency response
V1-V/Y in
F4V1
15
MHz (2) In each select mode, measure a frequency at which the output amplitude on pin 22 is 3dB down from the 15 kHz applied level.
V2-V in
F8V1
15
MHz
V2-C in
F6V1
15
MHz
TV-V in
CT2V1
60
70
dB (1) Apply a 3.58 MHz, 1.0 Vp-p sine wave to each input pin.
V out Crosstalk
V1-V/Y in
CT4V1
60
70
dB (2) In each select mode, compare signal output from the selected pin with leakage components from nonselected pins to find a crosstalk.
V2-V in
CT8V1
60
70
dB
V2-C in
CT6V1
60
70
dB
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TC90L01NG
Characteristics
Select Mode
Symbol
Test Circuit
Min.
Typ.
Max.
Unit
Test Method (1) Apply a 15 kHz sine wave to each input pin.
TV-V in
Y out
VDR2Y
3.0
4.0
Vp-p
V1-V/Y in
Input dynamic range
VDR4Y
3.0
4.0
Vp-p
V2-V in
VDR8Y
3.0
4.0
Vp-p
(2) In each select mode, measure an input amplitude at which the output waveform on pin 18 begins to be distorted.
TV-V in
Y out
G2Y
-0.5
0
0.5
dB (1) Apply a 15 kHz, 1.0 Vp-p sine wave to each input pin. (2) In each select mode, find the gain between input and output.
V1-V/Y in
Gain
G4Y
-0.5
0
0.5
dB
V2-V in
G8Y
-0.5
0
0.5
dB
TV-V in
F2Y
15
MHz
Y out Frequency response
V1-V/Y in
F4Y
15
MHz
V2-V in
F8Y
15
MHz
(1) Apply a 1.0 Vp-p sine wave to each input pin. (2) In each select mode, measure a frequency at which the output amplitude on pin 18 is 3dB down from the 15 kHz applied level. (1) Apply a 3.58 MHz, 1.0 Vp-p sine wave to each input pin. (2) In each select mode, compare signal output from the selected pin with leakage components from nonselected pins to find a crosstalk.
TV-V in
CT2Y
60
70
dB
Y out Crosstalk
V1-V/Y in
CT4Y
60
70
dB
V2-V in
CT8Y
60
70
dB
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TC90L01NG
Characteristics
Select Mode
Symbol
Test Circuit
Min.
Typ.
Max.
Unit
Test Method
TV-V in
VDR2C
1.5
2.0
Vp-p (1) Apply a 3.58MHz sine wave to each input pin. (2) In each select mode, measure an input amplitude at which the output waveform on pin 20 begins to be distorted.
V1-V/Y in
C out Input dynamic range
VDR4C
1.5
2.0
Vp-p
V2-V in
VDR8C
1.5
2.0
Vp-p
V2-C in
VDR6C
1.5
2.0
Vp-p
TV-V in
G2C
-0.5
0
0.5
dB (1) Apply a 15 kHz, 1.0 Vp-p sine wave to each input pin. (2) In each select mode, find the gain between input and output.
C out Gain
V1-V/Y in
G4C
-0.5
0
0.5
dB
V2-V in
G8C
-0.5
0
0.5
dB
V2-C in
G6C
-0.5
0
0.5
dB
TV-V in
F2C
15
MHz (1) Apply a 1.0 Vp-p sine wave to each input pin. (2) In each select mode, measure a frequency at which the output amplitude on pin 20 is 3dB down from the 15 kHz applied level.
V1-V/Y in
C out Frequency response
F4C
15
MHz
V2-V in
F8C
15
MHz
V2-C in
F6C
15
MHz
TV-V in
CT2C
60
70
dB (1) Apply a 3.58 MHz, 1.0 Vp-p sine wave to each input pin. (2) In each select mode, compare signal output from the selected pin with leakage components from nonselected pins to find a crosstalk.
V1-V/Y in
C out Crosstalk
CT4C
60
70
dB
V2-V in
CT8C
60
70
dB
V2-C in
CT6C
50
55
dB
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TC90L01NG
Characteristics
Select Mode
Symbol
Test Circuit
Min.
Typ.
Max.
Unit
Test Method
TV-L in
TV-L out
VDR1L1
3.0
5.0
Vp-p
(1) Apply a 1 kHz sine wave to each input pin.
(2) In each select mode, measure an input amplitude at which the output waveform on pin 17 begins to be distorted.
V1-L in
Input dynamic range
VDR5L1
3.0
5.0
Vp-p
V2-L in
VDR9L1
3.0
5.0
Vp-p
TV-L in
TV-L out
G1L1
4.0
6.0
8.0
dB
V1-L in
Gain
G5L1
4.0
6.0
8.0
dB
V2-L in
G9L1
4.0
6.0
8.0
dB
(1) Apply a 1 kHz, 1.0 Vp-p sine wave to each input pin. (2) In each select mode, find the gain between input and output. (3) ALC:Off
TV-L in V1-L in
VOL1L1
1.1
1.6
2.1
Vp-p
(1) Apply a 1 kHz, 2.0 Vp-p sine wave to each input pin. Vol:7F (2) In each select mode, measure an output amplitude at pin 17. (3) ALC:"1.6Vp-p"
TV-L out Output level
VOL5L1
1.1
1.6
2.1
Vp-p
V2-L in
VOL9L1
1.1
1.6
2.1
Vp-p
TV-L out ALC level Min. ALC level Max.
GANL1
-4.0
-3.0
-2.0
dB
(1) Set ALC level "1.1Vpp" and measure output level changes. Vol:7F
GAXL1
2.0
3.0
4.0
dB
(2) Set ALC level "2.3Vpp" and measure output level changes. Vol:7F
TV-L in
TV-L out
F1L1
0.1
MHz
(1) Apply a 1.0 Vp-p sine wave to each input pin. (2) In each select mode, measure a frequency at which the output amplitude on pin 17 is 3dB down from the 1 kHz applied level. (1) Apply a 1 kHz, 1.0 Vp-p sine wave to each input pin. (2) In each select
V1-L in
Frequency response
F5L1
0.1
MHz
V2-L in
F9L1
0.1
MHz
TV-L out
TV-L in
CT1L1
70
80
dB
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TC90L01NG
Characteristics Crosstalk
Select Mode
Symbol
Test Circuit
Min.
Typ.
Max.
Unit
Test Method mode, compare signal output from the selected pin with leakage components from nonselected pins to find a crosstalk.
V1-L in
CT5L1
70
80
dB
V2-L in
CT9L1
70
80
dB
TV-L in
TV-L out
M1L1
70
90
dB
V1-L in
Mute attenuation
M5L1
70
90
dB
V2-L in
M9L1
70
90
dB
(1) Apply a 1 kHz, 1.0 Vp-p sine wave to each input pin. (2) In each select mode, compare the output amplitudes on pin 17 when mute is turned on and turned off to find mute attenuation.
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2006/02/16
TC90L01NG
Characteristics
Select Mode
Symbol
Test Circuit
Min.
Typ.
Max.
Unit
Test Method
TV-R in
TV-R out
VDR3R1
3.0
5.0
Vp-p
(1) Apply a 1 kHz sine wave to each input pin.
(2) In each select mode, measure an input amplitude at which the output waveform on pin 16 begins to be distorted.
V1-R in
Input dynamic range
VDR7R1
3.0
5.0
Vp-p
V2-R in
VDR11R1
3.0
5.0
Vp-p
TV-R in
G3R1
4.0
6.0
8.0
dB
TV-R out Gain
V1-R in
G7R1
4.0
6.0
8.0
dB
V2-R in
G11R1
4.0
6.0
8.0
dB
(1) Apply a 1 kHz, 1.0 Vp-p sine wave to each input pin. (2) In each select mode, find the gain between input and output. (3) ALC:Off
TV-R in V1-R in
VOL3R1
1.1
1.6
2.1
Vp-p
(1) Apply a 1 kHz, 2.0 Vp-p sine wave to each input pin. Vol:7F (2) In each select mode, measure an output amplitude at pin 16. (3) ALC:"1.6Vp-p"
TV-R out Output level
VOL7R1
1.1
1.6
2.1
Vp-p
V2-R in
VOL11R1
1.1
1.6
2.1
Vp-p
TV-R out ALC level Min. ALC level Max.
GANR1
-4.0
-3.0
-2.0
dB
(1) Set ALC level "1.1Vpp" and measure output level changes. Vol:7F
GAXR1
2.0
3.0
4.0
dB
(2) Set ALC level "2.3Vpp" and measure output level changes. Vol:7F
TV-R in
TV-R out
F3R1
0.1
MHz
(1) Apply a 1.0 Vp-p sine wave to each input pin. (2) In each select mode, measure a frequency at which the output amplitude on pin 16 is 3dB down from the 1 kHz applied level. (1) Apply a 1 kHz, 1.0 Vp-p sine wave to each input pin. (2) In each select
V1-R in
Frequency response
F7R1
0.1
MHz
V2-R in
F11R1
0.1
MHz
TV-R out Crosstalk
TV-R in
CT3R1
70
80
dB
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2006/02/16
TC90L01NG
Characteristics
Select Mode
Symbol
Test Circuit
Min.
Typ.
Max.
Unit
Test Method mode, compare signal output from the selected pin with leakage components from nonselected pins to find a crosstalk.
V1-R in
CT7R1
70
80
dB
V2-R in
CT11R1
70
80
dB
TV-R in
M3R1
70
90
dB
TV-R out Mute attenuation
V1-R in
M7R1
70
90
dB
V2-R in
M11R1
70
90
dB
(1) Apply a 1 kHz, 1.0 Vp-p sine wave to each input pin. (2) In each select mode, compare the output amplitudes on pin 16 when mute is turned on and turned off to find mute attenuation.
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2006/02/16
TC90L01NG
Characteristics
Select Mode
Symbol
Test Circuit
Min.
Typ.
Max.
Unit
Test Method
TV-L in
Mon-L out
VDR1L2
3.5
5.0
Vp-p
V1-L in
Input dynamic range
VDR5L2
3.5
5.0
Vp-p
V2-L in
VDR9L2
3.5
5.0
Vp-p
(1) Apply a 1 kHz sine wave to each input pin. (2) In each select mode, measure an input amplitude at which the output waveform on pin 24 begins to be distorted.
TV-L in
Mon-L out
G1L2
-0.5
0
0.5
dB
V1-L in
Gain
G5L2
-0.5
0
0.5
dB
(1) Apply a 1 kHz, 1.0 Vp-p sine wave to each input pin.
(2) In each select mode, find the gain between input and output.
V2-L in
G9L2
-0.5
0
0.5
dB
TV-L in
Mon-L out Frequency response
F1L2
0.1
MHz
V1-L in
F5L2
0.1
MHz
V2-L in
F9L2
0.1
MHz
(1) Apply a 1.0 Vp-p sine wave to each input pin. (2) In each select mode, measure a frequency at which the output amplitude on pin 24 is 3dB down from the 1 kHz applied level. (1) Apply a 1 kHz, 1.0 Vp-p sine wave to each input pin. (2) In each select mode, compare signal output from the selected pin with leakage components from nonselected pins to find a crosstalk. (1) Apply a 1 kHz, 1.0 Vp-p sine wave to each input pin. (2) In each select mode, compare the output amplitudes on pin 24 when mute is turned on and turned off to find mute attenuation.
TV-L in
CT1L2
70
90
dB
Mon-L out Crosstalk
V1-L in
CT5L2
70
90
dB
V2-L in
CT9L2
70
90
dB
TV-L in
M1L2
70
80
dB
Mon-L out Mute attenuation
V1-L in
M5L2
70
80
dB
V2-L in
M9L2
70
80
dB
27
2006/02/16
TC90L01NG
Characteristics
Select Mode
Symbol
Test Circuit
Min.
Typ.
Max.
Unit
Test Method (1) Apply a 1 kHz sine wave to each input pin.
TV-R in
Mon-R out
VDR3R2
3.5
5.0
Vp-p
V1-R in
Input dynamic range
VDR7R2
3.5
5.0
Vp-p
V2-R in
VDR11R2
3.5
5.0
Vp-p
(2) In each select mode, measure an input amplitude at which the output waveform on pin 23 begins to be distorted. (1) Apply a 1 kHz, 1.0 Vp-p sine wave to each input pin.
(2) In each select mode, find the gain between input and output.
TV-R in
Mon-R out
G3R2
-0.5
0
0.5
dB
V1-R in
Gain
G7R2
-0.5
0
0.5
dB
V2-R in
G11R2
-0.5
0
0.5
dB
TV-R in
F3R2
0.1
MHz
Mon-R out Frequency response
V1-R in
F7R2
0.1
MHz
V2-R in
F11R2
0.1
MHz
(1) Apply a 1.0 Vp-p sine wave to each input pin. (2) In each select mode, measure a frequency at which the output amplitude on pin 23 is 3dB down from the 1 kHz applied level. (1) Apply a 1 kHz, 1.0 Vp-p sine wave to each input pin. (2) In each select mode, compare signal output from the selected pin with leakage components from nonselected pins to find a crosstalk. (1) Apply a 1 kHz, 1.0 Vp-p sine wave to each input pin. (2) In each select mode, compare the output amplitudes on pin 23 when mute is turned on and turned off to find mute attenuation.
TV-R in
CT3R2
70
90
dB
Mon-R out Crosstalk
V1-R in
CT7R2
70
90
dB
V2-R in
CT11R2
70
90
dB
TV-R in
M3R2
70
80
dB
Mon-R out Mute attenuation
V1-R in
M7R2
70
80
dB
V2-R in
M11R2
70
80
dB
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2006/02/16
TC90L01NG
Reference data
ALC characteristic
1.1Vp-p 3 2.5 Output Level (Vp-p) 2 1.5 1 0.5 0 0 1 2 3 Input Level (Vp-p) 4 5 6 1.6Vp-p 2.3Vp-p Off
Audio Volume characteristic
10 0
TV-L out, TV-R out (dB)
-10 -20 -30 -40 -50 -60 -70 -80 -90 7 F 17 1F 27 2F 37 3F 47 4F 57 5F 67 6F 77 7F
BUS Data (VOL)
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2006/02/16
TC90L01NG
Application Circuit
330p 1 + 75 0.1 + 330p 1 + 75 0.1 + 330p 1 + 75 0.01 + 330p 1 + 75 0.1 + 330p 1 + 1M 22 + 10 ALC 330p 1 + 10k 11 V2-R in SCL 14 100 GND 15 10k 9 V2-L in TV-R out 16 8 V2-V in TV-L out 17 10k 7 V1-R in Y out 18 0.01 6 V1-C in I/O 1 19
IN OUT
10k
1
TV-L in
Monitor-L out
24
2
TV-V in
Monitor-R out
23
10k
3
TV-R in
V out
22
4
V1-V/Y in
I/O 2 21
IN OUT
4.7k 5 V1-L in C out 20 0.01
10k
4.7k
0.01 12 + 100 Vcc SDA 13
100
Vcc9V
30
2006/02/16
TC90L01NG
Test Circuit
R1620
TV-L
TP-1 C11
+
C200.01 1 TV-L in Monitor-L out 24 TP-24 2 TV-V in Monitor-R out 23 TP-23 3 TV-R in V out 22 V out V1-V/Y in C190.01
R275
TV-V
+
TP-2 C210 TP-3 C31
+
R3620
TV-R
R475
V1-V/Y
+
TP-4 C410 4 TP-5 C51
+
I/O 2 21
IN
R5620
V1-L
TP-21 5 TP-6 V1-L in C out 20 C out V1-C in
OUT
R174.7k
SW-6 TP-26 C170.01
R675
V1-C
C60.01
+
6 TP-7
I/O 1 19
IN
R7620
V1-R
C71
+
TP-19 7 TP-8 V1-R in Y out 18 Y out 17
OUT
R154.7k
SW-4 C150.01 TP-25
R875
V2-V
+
C810 8 TP-9 C91
+
V2-V in
TV-L out
R9620
V2-L
TV-L out 16 TV-R out 15
9
V2-L in
TV-R out
TP-10 R111M C1122 + R12600
V2-R
10 ALC TP-11 11 V2-R in
GND
SCL
14
R14100
SCL
C121
+
TP-12 12 Vcc SDA 13 TP-14 R13100
C130.01
SDA
TP-13
+
C14100
Vcc9V
31
2006/02/16
TC90L01NG
Package Dimensions
Weight: 1.22 g (typ.)
32
2006/02/16
TC90L01NG
About solderability, following conditions were confirmed. Solderability (1) Use of Sn-37Pb solder Bath solder bath temperature = 230 dipping time = 5 seconds the number of times = once use of R-type flux (2) Use of Sn-3.0Ag-0.5Cu solder solder bath temperature = 245 dipping time = 5 seconds the number of times = once use of R-type flux
RESTRICTIONS ON PRODUCT USE
The information contained herein is subject to change without notice.
030619EBA
The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. The products described in this document are subject to the foreign exchange and foreign trade laws. TOSHIBA products should not be embedded to the downstream products which are prohibited to be produced and sold, under any law and regulations.
33
2006/02/16

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